1. Field of the Invention
This invention generally relates to an improvement to the over-sampling type digital/analog converter for carrying out digital/analog conversions at a frequency by far much higher than the signal frequency in order to achieve a high S/N level and, more particularly, it relates to an improvement to the sigma delta type digital/analog converter (hereinafter referred to .SIGMA..DELTA. type D/A converter) comprising a digital sigma-delta modulator.
2. Description of the Related Art
Conventionally, the sampling frequency f.sub.S of a D/A converter is set to a value more than twice as large as that of the signal frequency bandwidth f.sub.B for digitizing the incoming analog signal in order to eliminate possibility of losing any information contained in the analog signal in the course of conversion. Such operation is theoretically justified by the Nyquist theorem. Thus, the sampling frequency f.sub.S of a conventional D/A converter is normally set to a value 2.2 to 2.4 times as large as that of the signal frequency bandwidth f.sub.B.
Recently, there was developed a so-called over-sampling type D/A converter having a sampling frequency f.sub.S by far much higher than the signal frequency bandwidth f.sub.B in an attempt to enhance the accuracy of conversion and such converters have been widely used for practical applications. With the over sampling type D/A converter, the maximum value of the S/N ratio, or S/N.sub.MAX, is expressed by formula (1) below. EQU S/N.sub.MAX =(3/2).multidot.2.sup.2n .multidot.(f.sub.S /2f.sub.B) (1)
where n is the number of bits (resolution) of the digital signal.
As seen from formula (1) above, the level of S/N.sub.MAX is linearly proportional to the sampling frequency f.sub.S and, therefore, a high accuracy of conversion can be obtained by selecting a high sampling frequency f.sub.S.
On the other hand, while S/N.sub.MAX can be quadrupled by incrementing the number of bits n by 1, it is only doubled by doubling the sampling frequency f.sub.S. In view of this, a number of improvements have been proposed to the over-sampling type D/A converter in order to improve the S/N ratio without excessively raising the sampling frequency f.sub.S.
The so-called .SIGMA..DELTA. type D/A converter comprising a sigma-delta modulator (hereinafter referred to as .SIGMA..DELTA. modulator) is an outcome of the efforts for such improvements. FIG. 1 of the accompanying drawings shows a circuit diagram of a .SIGMA..DELTA. type D/A converter provided with a primary .SIGMA..DELTA. modulator. In FIG. 1, 11 and 21 respectively denote a .SIGMA..DELTA. modulator and a D/A conversion circuit. X(z) and Y(z) are respectively the z transform value of input signal and that of output signal. E(z) is the z transform value of quantization error.
The .SIGMA..DELTA. type D/A converter of FIG. 1 operates in a manner as described below. Firstly, an input signal (digital signal) X(z) is applied to subtracter 13. The output signal of the subtracter 13 is then given to integrating circuit 14. The integrating circuit 14 comprises an adder 15 and a 1 clock delay circuit 16. The output signal of the integrating circuit 14 is then given to quantizer 17. A quantization error E(z) is produced when the output signal of the integrating circuit 14 is quantized by the quantizer 17. In other words, the output signal Y(z) of the quantizer 17 contains the quantization error E(z). The output signal Y(z) then passes through the 1 clock delay circuit 18 and is sent to the subtracter 13 as a feedback signal. The output signal Y(z) of the quantizer 17 is also applied to D/A converter 21 for digital/analog conversion.
In a .SIGMA..DELTA. type D/A converter as described above, equation (2) below holds true. EQU Y(z)=X(z)+(1-z.sup.-1).multidot.E(z) (2)
The quantization error (Ez) is not related with the input signal X(z) and frequency characteristics is flat (or no frequency dependency). Therefore, the noise frequency characteristics of the .SIGMA..DELTA. type D/A converter can be expressed by formula (3) below. EQU (1-e.sup.j.omega.T)=j.omega.T (3)
where .omega. is the angular frequency and .omega.T&lt;&lt;1.
This means that the noise power is proportional to the square of the sampling frequency (f.sub.S).sup.3 provided that the signal frequency bandwidth f.sub.B is sufficiently low relative to the sampling frequency f.sub.S. Thus, the S/N level within the signal frequency bandwidth f.sub.B is improved by 9dB each time the sampling frequency f.sub.S is doubled. S/N.sub.MAX is expressed by formula (3)' below. EQU (S/N).sub.MAX =(9.pi./2).multidot.(f.sub.S /2.pi.f.sub.B).sup.3 ( 3)
FIG. 2 shows a circuit diagram of a .SIGMA..DELTA. type D/A converter provided with a .SIGMA..DELTA. modulator of a higher order. This D/A converter comprises an m-order integrating circuit 19 and has transfer characteristics as expressed by formula (4) below. EQU Y(z)=X(z)+(1-z.sup.-1).sup.m .multidot.E(z) (4)
where m is the number of orders.
With a .SIGMA..DELTA. type D/A converter comprising a .SIGMA..DELTA. modulator of a higher order as described above, the S/N ratio is improved by 3.times.(2m+1)dB within the signal frequency band-width f.sub.B each time the sampling frequency f.sub.S is doubled.
FIG. 3 shows a circuit diagram of another .SIGMA..DELTA. type D/A converter which is equivalent to the .SIGMA..DELTA. type D/A converter of FIG. 2. In FIG. 3, 20 denotes a filter circuit. This type D/A converter can make an m-order .SIGMA..DELTA. type D/A converter by giving its transfer function H(z) a value defined by formula (5) below. EQU H(z)=1-(1-z.sup.-1).sup.m ( 5)
With any of the .SIGMA..DELTA. type D/A converters as illustrated in FIGS. 1 through 3, either the sampling rate or the number of orders of .SIGMA..DELTA. modulator needs to be raised for improvement of performance. When the sampling rate exceeds a given level with such a D/A converter, however, the conversion rate of the D/A conversion circuit cannot accommodate the sampling rate any more. The use of a .SIGMA..DELTA. modulator having a too large number of orders in a .SIGMA..DELTA. type D/A converter can, on the other hand, result in a degraded stability of the related D/A conversion circuit, which in turn needs to be compensated by the use of a limiter for controlling the output amplitude, although such an additional arrangement may not be able to improve the overall performance of the converter.